naja-scope
Active·★ 17·Apache-2.0·Updated 2026-10-18
naja-scope is an MCP server that enables AI agents to explore SystemVerilog and VHDL designs by asking targeted questions, eliminating the need to paste large codebases. It provides structured access to elaborated design hierarchy, connectivity, and source references, allowing efficient analysis of complex hardware.
#SystemVerilog#VHDL#RTL Analysis#Netlist Exploration#AI Assistant Integration#Hardware Design#Connectivity Tracing#Design Intent Recovery
01
Features
01Trace connectivity (drivers/loads) across design hierarchy.
02Explore module hierarchy, instances, and ports on demand.
03Jump to exact source code lines for any design object.
04Trace fan-in and fan-out combinational logic cones.
05Recover elaborated design intent like enum state names and struct fields.
02
Compatibility
Python
Runtime
Verified via docs
SystemVerilog
Language
Verified via docs
VHDL
Language
Verified via docs
Linux
OS
Verified via docs
macOS
OS
Verified via docs
Windows
OS
Verified via docs
03
Quick start
1
$ pip install naja-scope
04
Use cases
↳Enable AI assistants (e.g., Claude Code, ChatGPT) to navigate and query complex SystemVerilog/VHDL designs efficiently.
↳Perform structural analysis and debugging on large RTL and gate-level netlists.
↳Bridge the gap between raw source code and the elaborated design for AI-driven insights.
↳Identify and trace signals, logic paths, and module dependencies within hardware designs.
05
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